46 #define IS_S2LP_GPIO(PIN) ((PIN == S2LP_GPIO_0) || \ 47 (PIN == S2LP_GPIO_1) || \ 48 (PIN == S2LP_GPIO_2) || \ 52 #define IS_S2LP_GPIO_MODE(MODE) ((MODE == S2LP_GPIO_MODE_DIGITAL_INPUT) || \ 53 (MODE == S2LP_GPIO_MODE_DIGITAL_OUTPUT_LP) || \ 54 (MODE == S2LP_GPIO_MODE_DIGITAL_OUTPUT_HP)) 56 #define IS_S2LP_GPIO_IO(IO_SEL) ((IO_SEL == S2LP_GPIO_DIG_OUT_IRQ) || \ 57 (IO_SEL == S2LP_GPIO_DIG_OUT_POR_INV) || \ 58 (IO_SEL == S2LP_GPIO_DIG_OUT_WUT_EXP) || \ 59 (IO_SEL == S2LP_GPIO_DIG_OUT_LBD) || \ 60 (IO_SEL == S2LP_GPIO_DIG_OUT_TX_DATA) || \ 61 (IO_SEL == S2LP_GPIO_DIG_OUT_TX_STATE) || \ 62 (IO_SEL == S2LP_GPIO_DIG_OUT_TXRX_FIFO_ALMOST_EMPTY) || \ 63 (IO_SEL == S2LP_GPIO_DIG_OUT_TXRX_FIFO_ALMOST_FULL) || \ 64 (IO_SEL == S2LP_GPIO_DIG_OUT_RX_DATA) || \ 65 (IO_SEL == S2LP_GPIO_DIG_OUT_RX_CLOCK) || \ 66 (IO_SEL == S2LP_GPIO_DIG_OUT_RX_STATE) || \ 67 (IO_SEL == S2LP_GPIO_DIG_OUT_NOT_STANDBY_SLEEP) || \ 68 (IO_SEL == S2LP_GPIO_DIG_OUT_STANDBY) || \ 69 (IO_SEL == S2LP_GPIO_DIG_OUT_ANTENNA_SWITCH) || \ 70 (IO_SEL == S2LP_GPIO_DIG_OUT_VALID_PREAMBLE) || \ 71 (IO_SEL == S2LP_GPIO_DIG_OUT_SYNC_DETECTED) || \ 72 (IO_SEL == S2LP_GPIO_DIG_OUT_RSSI_THRESHOLD) || \ 73 (IO_SEL == S2LP_GPIO_DIG_OUT_MCU_CLOCK) || \ 74 (IO_SEL == S2LP_GPIO_DIG_OUT_TX_RX_MODE) || \ 75 (IO_SEL == S2LP_GPIO_DIG_OUT_VDD) || \ 76 (IO_SEL == S2LP_GPIO_DIG_OUT_GND) || \ 77 (IO_SEL == S2LP_GPIO_DIG_OUT_SMPS_EXT) ||\ 78 (IO_SEL == S2LP_GPIO_DIG_OUT_SLEEP) ||\ 79 (IO_SEL == S2LP_GPIO_DIG_OUT_READY) ||\ 80 (IO_SEL == S2LP_GPIO_DIG_OUT_LOCK) ||\ 81 (IO_SEL == S2LP_GPIO_DIG_OUT_WAIT_FOR_LOCK_SIG) ||\ 82 (IO_SEL == S2LP_GPIO_DIG_OUT_TX_DATA_OOK_SIGNAL) ||\ 83 (IO_SEL == S2LP_GPIO_DIG_OUT_WAIT_FOR_READY2_SIG) ||\ 84 (IO_SEL == S2LP_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_PM_SET) ||\ 85 (IO_SEL == S2LP_GPIO_DIG_OUT_WAIT_VCO_CALIBRATION) ||\ 86 (IO_SEL == S2LP_GPIO_DIG_OUT_ENABLE_SYNTH_FULL_CIRCUIT) ||\ 87 (IO_SEL == S2LP_GPIO_DIG_IN_TX_COMMAND) ||\ 88 (IO_SEL == S2LP_GPIO_DIG_IN_RX_COMMAND) ||\ 89 (IO_SEL == S2LP_GPIO_DIG_IN_TX_DATA_INPUT_FOR_DIRECTRF) ||\ 90 (IO_SEL == S2LP_GPIO_DIG_IN_DATA_WAKEUP) ||\ 91 (IO_SEL == S2LP_GPIO_DIG_IN_EXT_CLOCK_AT_34_7KHZ)) 94 #define IS_S2LP_GPIO_LEVEL(LEVEL) ((LEVEL == LOW) || \ 97 #define IS_S2LP_CLOCK_OUTPUT_XO(RATIO) ((RATIO == XO_RATIO_1) || \ 98 (RATIO == XO_RATIO_1_2) || \ 99 (RATIO == XO_RATIO_1_4) || \ 100 (RATIO == XO_RATIO_1_8) || \ 101 (RATIO == XO_RATIO_1_16) || \ 102 (RATIO == XO_RATIO_1_32) || \ 103 (RATIO == XO_RATIO_1_64) || \ 104 (RATIO == XO_RATIO_1_128) || \ 105 (RATIO == XO_RATIO_1_256)) 107 #define IS_S2LP_CLOCK_OUTPUT_RCO(RATIO) ((RATIO == RCO_RATIO_1) || \ 108 (RATIO == RCO_RATIO_1_128)) 111 #define IS_S2LP_CLOCK_OUTPUT_EXTRA_CYCLES(CYCLES) ((CYCLES == EXTRA_CLOCK_CYCLES_0) || \ 112 (CYCLES == EXTRA_CLOCK_CYCLES_128) || \ 113 (CYCLES == EXTRA_CLOCK_CYCLES_256) || \ 114 (CYCLES == EXTRA_CLOCK_CYCLES_512)) 117 #define IS_S2LP_IRQ_LIST(VALUE) ((VALUE == RX_DATA_READY) || \ 118 (VALUE == RX_DATA_DISC) || \ 119 (VALUE == TX_DATA_SENT) || \ 120 (VALUE == MAX_RE_TX_REACH) || \ 121 (VALUE == CRC_ERROR) || \ 122 (VALUE == TX_FIFO_ERROR) || \ 123 (VALUE == RX_FIFO_ERROR) || \ 124 (VALUE == TX_FIFO_ALMOST_FULL) || \ 125 (VALUE == TX_FIFO_ALMOST_EMPTY) || \ 126 (VALUE == RX_FIFO_ALMOST_FULL) || \ 127 (VALUE == RX_FIFO_ALMOST_EMPTY) || \ 128 (VALUE == MAX_BO_CCA_REACH) || \ 129 (VALUE == VALID_PREAMBLE) || \ 130 (VALUE == VALID_SYNC) || \ 131 (VALUE == RSSI_ABOVE_TH) || \ 132 (VALUE == WKUP_TOUT_LDC) || \ 133 (VALUE == READY) || \ 134 (VALUE == STANDBY_DELAYED) || \ 135 (VALUE == LOW_BATT_LVL) || \ 139 (VALUE == VCO_CALIBRATION_END) || \ 140 (VALUE == PA_CALIBRATION_END) || \ 141 (VALUE == PM_COUNT_EXPIRED) || \ 142 (VALUE == XO_COUNT_EXPIRED) || \ 143 (VALUE == TX_START_TIME) || \ 144 (VALUE == RX_START_TIME) || \ 145 (VALUE == RX_TIMEOUT) || \ 146 (VALUE == RX_SNIFF_TIMEOUT) || \ 172 s_assert_param(IS_S2LP_GPIO(pxGpioInitStruct->
xS2LPGpioPin));
173 s_assert_param(IS_S2LP_GPIO_MODE(pxGpioInitStruct->
xS2LPGpioMode));
174 s_assert_param(IS_S2LP_GPIO_IO(pxGpioInitStruct->
xS2LPGpioIO));
199 s_assert_param(IS_S2LP_GPIO(xGpioX));
200 s_assert_param(IS_S2LP_GPIO_LEVEL(xLevel));
210 g_xStatus = S2LPSpiWriteRegisters(xGpioX, 1, &tmp);
230 s_assert_param(IS_S2LP_GPIO(xGpioX));
232 g_xStatus = S2LPSpiReadRegisters(xGpioX, 1, &tmp);
235 tmp &= GPIO_SELECT_REGMASK;
255 uint8_t tmp[4] = {0x00,0x00,0x00,0x00};
257 if(pxIrqInit!=NULL) {
258 uint32_t tempValue = 0x00000000;
260 *pxIrqInit = (*(
S2LPIrqs*)&tempValue);
285 tmpPoint = (uint8_t*)(pxIrqInit);
286 for(uint8_t i=0; i<4; i++) {
287 tmp[3-i]= tmpPoint[i];
305 uint8_t tmpBuffer[4];
306 uint32_t tempValue = 0;
308 s_assert_param(IS_S2LP_IRQ_LIST(xIrq));
309 s_assert_param(IS_SFUNCTIONAL_STATE(xNewState));
314 for(uint8_t i=0; i<4; i++) {
315 tempValue += ((uint32_t)tmpBuffer[i])<<(8*(3-i));
319 if(xNewState == S_DISABLE) {
320 tempValue &= (~xIrq);
327 for(uint8_t j=0; j<4; j++) {
328 tmpBuffer[j] = (uint8_t)(tempValue>>(8*(3-j)));
355 uint8_t* pIrqPointer = (uint8_t*)pxIrqMask;
359 for(uint8_t i=0; i<4; i++) {
360 *pIrqPointer = tmp[3-i];
386 uint8_t* pIrqPointer = (uint8_t*)pxIrqStatus;
391 for(uint8_t i=0; i<4; i++) {
392 *pIrqPointer = tmp[3-i];
405 uint8_t tmp[4] = {0, 0, 0, 0};
421 uint32_t tempValue = 0;
424 s_assert_param(IS_S2LP_IRQ_LIST(xFlag));
427 for(uint8_t i=0; i<4; i++) {
428 tempValue += ((uint32_t)tmp[i])<<(8*(3-i));
431 if(tempValue & xFlag) {
void S2LPGpioIrqGetMask(S2LPIrqs *pxIrqMask)
Fill a pointer to a structure of S2LPIrqs type reading the IRQ_MASK registers.
SBool
boolean type enumeration.
#define IRQ_STATUS3_ADDR
IRQ_STATUS3 register.
S2LPGpioPin
S2LP GPIO pin enumeration.
SFunctionalState
S2LP Functional state. Used to enable or disable a specific option.
void S2LPGpioIrqInit(S2LPIrqs *pxIrqInit)
Enable the IRQs according to the user defined pxIrqInit structure.
void S2LPGpioIrqGetStatus(S2LPIrqs *pxIrqStatus)
Fill a pointer to a structure of S2LPIrqs type reading the IRQ_STATUS registers.
IRQ bitfield structure for S2LP. This structure is used to read or write the single IRQ bit....
OutputLevel
S2LP OutputLevel enumeration.
IrqList
IRQ list enumeration for S2LP. This enumeration type can be used to address a specific IRQ.
void S2LPGpioSetLevel(S2LPGpioPin xGpioX, OutputLevel xLevel)
Force S2LP GPIO_x configured as digital output, to VDD or GND.
Configuration and management of S2-LP GPIO.
void S2LPGpioIrqConfig(IrqList xIrq, SFunctionalState xNewState)
Enable or disables a specific IRQ.
void S2LPGpioIrqClearStatus(void)
Clear the IRQ status registers.
#define IRQ_MASK3_ADDR
IRQ_MASK3 register.
volatile S2LPStatus g_xStatus
S2LP Status global variable. This global variable of S2LPStatus type is updated on every SPI transact...
S2LPGpioMode xS2LPGpioMode
OutputLevel S2LPGpioGetLevel(S2LPGpioPin xGpioX)
Return output value (VDD or GND) of S2LP GPIO_x, when it is configured as digital output.
Header file for low level S2LP SPI driver.
void S2LPGpioIrqDeInit(S2LPIrqs *pxIrqInit)
Deinit the S2LPIrqs structure setting all the bitfield to 0. Moreover, it sets the IRQ mask registers...
void S2LPGpioInit(SGpioInit *pxGpioInitStruct)
Initialize the S2LP GPIOx according to the specified parameters in the pxGpioInitStruct.
S2LP GPIO Init structure definition.
SBool S2LPGpioIrqCheckFlag(IrqList xFlag)
Verifie if a specific IRQ has been generated. The call resets all the IRQ status, so it can't be used...