39 #include "cc1101_def.h" 40 #include "radio_drv.h" 41 #include "hal_spi_rf.h" 42 #include "hal_timer.h" 43 #include "cc1190_drv.h" 48 #define SCALING_FREQ (float)((RF_XTAL)/65.536) 49 #define SCALING_FREQEST (unsigned long)((RF_XTAL)/16.384) 54 unsigned char paTable[1];
55 unsigned char rf_end_packet = 0;
81 const registerSetting_t preferredSettings_1200bps[]=
138 const registerSetting_t preferredSettings_38400bps[]=
198 const registerSetting_t preferredSettings_250kbps[]=
248 int radio_init(
unsigned char config_select) {
250 unsigned char i, writeByte, preferredSettings_length;
252 registerSetting_t *preferredSettings;
256 trxRfSpiInterfaceInit(4);
259 trxSpiCmdStrobe(RF_SRES);
262 __delay_cycles(16000);
264 switch (config_select) {
266 preferredSettings_length =
sizeof(preferredSettings_1200bps)/
sizeof(registerSetting_t);
267 preferredSettings = (registerSetting_t *)preferredSettings_1200bps;
271 preferredSettings_length =
sizeof(preferredSettings_38400bps)/
sizeof(registerSetting_t);
272 preferredSettings = (registerSetting_t *)preferredSettings_38400bps;
276 preferredSettings_length =
sizeof(preferredSettings_250kbps)/
sizeof(registerSetting_t);
277 preferredSettings = (registerSetting_t *)preferredSettings_250kbps;
281 preferredSettings_length =
sizeof(preferredSettings_1200bps)/
sizeof(registerSetting_t);
282 preferredSettings = (registerSetting_t *)preferredSettings_1200bps;
288 for(i = 0; i < preferredSettings_length; i++) {
289 writeByte = preferredSettings[i].data;
290 trx8BitRegAccess(RADIO_WRITE_ACCESS, preferredSettings[i].addr, &writeByte, 1);
294 trx8BitRegAccess(RADIO_WRITE_ACCESS|RADIO_BURST_ACCESS, PATABLE, paTable, 1);
316 int radio_prepare(
unsigned char *payload,
unsigned short payload_len) {
318 trx8BitRegAccess(RADIO_WRITE_ACCESS+RADIO_BURST_ACCESS, TXFIFO, payload, payload_len);
340 int radio_transmit(
void) {
343 #ifdef ENABLE_RANGE_EXTENDER 344 range_extender_txon();
347 trxSpiCmdStrobe(RF_STX);
367 int radio_receive_on(
void) {
370 #ifdef ENABLE_RANGE_EXTENDER 371 range_extender_rxon();
374 trxSpiCmdStrobe(RF_SRX);
396 int radio_send(
unsigned char *payload,
unsigned short payload_len) {
398 trx8BitRegAccess(RADIO_WRITE_ACCESS|RADIO_BURST_ACCESS, TXFIFO, payload, payload_len);
401 #ifdef ENABLE_RANGE_EXTENDER 402 range_extender_txon();
405 trxSpiCmdStrobe(RF_STX);
427 int radio_read(
unsigned char *buf,
unsigned short *buf_len) {
428 unsigned char status;
429 unsigned char pktLen;
432 trx8BitRegAccess(RADIO_READ_ACCESS|RADIO_BURST_ACCESS, RXBYTES, &pktLen, 1);
433 pktLen = pktLen & NUM_RXBYTES;
436 if ((pktLen > 0) && (pktLen <= *buf_len)) {
439 trx8BitRegAccess(RADIO_READ_ACCESS|RADIO_BURST_ACCESS, RXFIFO, buf, pktLen);
445 trx8BitRegAccess(RADIO_READ_ACCESS+RADIO_BURST_ACCESS, PKTSTATUS, &status, 1);
452 trxSpiCmdStrobe(RF_SFRX);
456 return (status & CRC_OK);
476 int radio_channel_clear(
void) {
477 unsigned char status;
480 trx8BitRegAccess(RADIO_READ_ACCESS+RADIO_BURST_ACCESS, PKTSTATUS, &status, 1);
483 return(status & 0x40);
504 int radio_wait_for_idle(
unsigned short max_hold) {
507 unsigned char reg_status;
510 trx8BitRegAccess(RADIO_READ_ACCESS+RADIO_BURST_ACCESS, MARCSTATE, ®_status, 1);
513 reg_status = (reg_status & 0x1F);
516 if(!(reg_status == MARCSTATE_IDLE)) {
520 RF_GDO_PxIES |= RF_GDO_PIN;
521 RF_GDO_PxIFG &= ~RF_GDO_PIN;
522 RF_GDO_PxIE |= RF_GDO_PIN;
526 hal_timer_wait(max_hold);
530 _BIS_SR(LPM0_bits + GIE);
534 RF_GDO_PxIE &= ~RF_GDO_PIN;
538 if(rf_end_packet == 0) {
542 #ifdef ENABLE_RANGE_EXTENDER 543 range_extender_idle();
563 int radio_is_busy(
void) {
566 while (!(RF_GDO_IN & RF_GDO_PIN));
569 while (RF_GDO_IN & RF_GDO_PIN);
572 RF_GDO_PxIFG &= ~RF_GDO_PIN;
591 int radio_pending_packet(
void) {
593 RF_GDO_PxIES |= RF_GDO_PIN;
594 RF_GDO_PxIE |= RF_GDO_PIN;
596 return rf_end_packet;
613 int radio_clear_pending_packet(
void) {
615 RF_GDO_PxIES &= ~RF_GDO_PIN;
616 RF_GDO_PxIE &= ~RF_GDO_PIN;
637 int radio_set_pwr(
int tx_pwr) {
639 unsigned char reg_access;
642 const unsigned char paTable_CC1101[10] =
643 {0x03, 0x0E, 0x1E, 0x27, 0x38, 0x8E, 0x84, 0xCC, 0xC3, 0xC0};
646 const int paOut_CC1101[10] = {-30, -20, -15, -10, -6, 0, 5, 7, 10, 12};
649 for(ee=0; ee<10;ee++){
650 actual_pwr = paOut_CC1101[ee];
653 if(tx_pwr <= actual_pwr){
656 reg_access = paTable_CC1101[ee];
657 trx8BitRegAccess(RADIO_WRITE_ACCESS | RADIO_BURST_ACCESS, PATABLE, ®_access, 1);
684 int radio_set_freq(
unsigned long freq) {
686 unsigned long freq_word;
687 unsigned char freq_byte[3];
692 freq_float = freq*1000;
693 freq_word = (
unsigned long) (freq_float * 1/(
float)SCALING_FREQ);
696 freq_byte[2] = ((uint8*)&freq_word)[0];
697 freq_byte[1] = ((uint8*)&freq_word)[1];
698 freq_byte[0] = ((uint8*)&freq_word)[2];
701 trx8BitRegAccess(RADIO_WRITE_ACCESS | RADIO_BURST_ACCESS , FREQ2, freq_byte, 3);
721 int radio_idle(
void) {
724 #ifdef ENABLE_RANGE_EXTENDER 725 range_extender_idle();
729 trxSpiCmdStrobe(RF_SIDLE);
732 trxSpiCmdStrobe(RF_SFRX);
733 trxSpiCmdStrobe(RF_SFTX);
751 int radio_sleep(
void) {
754 #ifdef ENABLE_RANGE_EXTENDER 755 range_extender_idle();
759 trxSpiCmdStrobe(RF_SIDLE);
762 trxSpiCmdStrobe(RF_SPWD);
781 int radio_wake(
void) {
784 trxSpiCmdStrobe(RF_SIDLE);
787 __delay_cycles(1000);
810 int radio_freq_error(
void) {
813 unsigned char regState;
816 trx8BitRegAccess(RADIO_READ_ACCESS | RADIO_BURST_ACCESS, FREQEST, ®State, 1);
819 freq_error_est = regState;
822 if (freq_error_est > 128) {
823 freq_error_est = freq_error_est - 256;
827 freq_error_est = freq_error_est * (long)SCALING_FREQEST;
829 return ((
int)freq_error_est);
848 #pragma vector=RF_PORT_VECTOR 849 __interrupt
void radio_isr(
void) {
851 if(RF_GDO_PxIFG & RF_GDO_PIN) {
854 __bic_SR_register_on_exit(LPM3_bits);
857 RF_GDO_PxIFG &= ~RF_GDO_PIN;